Non-volatile memories are useful elements of integrated circuits due to their ability to maintain data absent a power supply. Phase change materials have been investigated for use in non-volatile memory cells. Phase change memory elements include phase change materials, such as chalcogenide alloys, which are capable of stably transitioning between amorphous and crystalline phases. Each phase exhibits a particular resistance state and the resistance states distinguish the logic values of the memory element. Specifically, an amorphous state exhibits a relatively high resistance, and a crystalline state exhibits a relatively low resistance.
A conventional phase change memory element 1, illustrated in FIGS. 1A and 1B, has a layer of phase change material 8 between first and second electrodes 2, 4, which are supported by a dielectric material 6. The phase change material 8 is set to a particular resistance state according to the amount of current applied between the first and second electrodes 2, 4. To obtain an amorphous state (FIG. 1B), a relatively high write current pulse (a reset pulse) is applied through the conventional phase change memory element 1 to melt at least a portion 9 of the phase change material 8 covering the first electrode 2 for a first period of time. The current is removed and the phase change material 8 cools rapidly to a temperature below the crystallization temperature, which results in the portion 9 of the phase change material 8 covering the first electrode 2 having the amorphous state. To obtain a crystalline state (FIG. 1A), a lower current write pulse (a set pulse) is applied to the conventional phase change memory element 1 for a second period of time (typically longer in duration than the crystallization time of amorphous phase change material) to heat the amorphous portion 9 of the phase change material 8 to a temperature below its melting point, but above its crystallization temperature. This causes the amorphous portion 9 of the phase change material 8 to re-crystallize to the crystalline state that is maintained once the current is removed and the conventional phase change memory element 1 is cooled. The phase change memory element 1 is read by applying a read voltage, which does not change the phase state of the phase change material 8.
One drawback of conventional phase change memory is the large programming current needed to achieve the phase change. This requirement leads to large access transistor design to achieve adequate current drive. Another problem associated with the memory element 1, is poor reliability due to uncontrollable mixing of amorphous and polycrystalline states at the edges of the programmable volume (i.e., portion 9). Accordingly, it is desirable to have phase change memory devices with reduced programming requirements and increased reliability. Additionally, since in the memory element 1, the phase change material 8 is in direct contact with a large area of the first electrode 2, there is a large heat loss resulting in a large reset current requirement.
Accordingly, alternative designs are needed to address the above noted problems.